Compares the low double-precision floating-point values in the source operand (second operand) and the destination operand (first operand) and returns the results of the comparison to the destination operand. The comparison predicate operand (third operand) specifies the type of comparison performed. The comparison result is a quadword mask of all 1s (comparison true) or all 0s (comparison false). The source operand can be an XMM register or a 64-bit memory location. The destination operand is an XMM register. The result is stored in the low quadword of the destination operand; the high quadword remains unchanged. The comparison predicate operand is an 8-bit immediate the first 3 bits of which define the type of comparison to be made (see the following table); bits 4 through 7 of the immediate are reserved.
The unordered relationship is true when at least one of the two source operands being compared is a NaN; the ordered relationship is true when neither source operand is a NaN.
A subsequent computational instruction that uses the mask result in the destination operand as an input operand will not generate a fault, because a mask of all 0s corresponds to a floating-point value of +0.0 and a mask of all 1s corresponds to a QNaN.
Some of the comparisons listed in the following table can be achieved only through software emulation.
For these comparisons the program must swap the operands (copying registers when necessary to protect the data that will now be in the destination operand), and then perform the compare using a different predicate. The predicate to be used for these emulations is listed in the following table under the heading Emulation.
Compilers and assemblers may implement the following two-operand pseudo-ops in addition to the three-operand CMPSD instruction. See the following table.
|CMPEQSD xmm1, xmm2||CMPSD xmm1,xmm2, 0|
|CMPLTSD xmm1, xmm2||CMPSD xmm1,xmm2, 1|
|CMPLESD xmm1, xmm2||CMPSD xmm1,xmm2, 2|
|CMPUNORDSD xmm1, xmm2||CMPSD xmm1,xmm2, 3|
|CMPNEQSD xmm1, xmm2||CMPSD xmm1,xmm2, 4|
|CMPNLTSD xmm1, xmm2||CMPSD xmm1,xmm2, 5|
|CMPNLESD xmm1, xmm2||CMPSD xmm1,xmm2, 6|
|CMPORDSD xmm1, xmm2||CMPSD xmm1,xmm2, 7|
The greater-than relations not implemented in the processor require more than one instruction to emulate in software and therefore should not be implemented as pseudo-ops. (For these, the programmer should reverse the operands of the corresponding less than relations and use move instructions to ensure that the mask is moved to the correct destination register and that the source operand is left intact.)